TSMC is on track to start high-volume production of chips on N2 (2nm-class), its first production technology that relies on gate-all-around (GAA) nanosheet transistors, in the second half of this ...

TSMC exposed the defect density (D0) of its N2 process technology relative to its predecessors at the same stage of development at its North American Technology Symposium this week. According to ...

TSMC claims its upcoming N2 manufacturing node is ahead of schedule on defect reduction, even though it is the company’s first attempt at gate-all-around (GAA) nanosheet transistor technology.

TSMC is going from its N naming convention—as in, N2, its 2nm process—to A for chips smaller than 2nm. The first of these will be A16 and A14, the latter of which TSMC just highlighted at the ...

A14 uses TSMC’s 2nd Generation GAA (gate-all-around) nanosheet transistors—a key update from the first-gen GAA seen in the N2 series. Additionally, TSMC is introducing NanoFlex Pro ...

which is the first HPC chip to be made on TSMC's new 2nm (N2) process node. Read more: AMD confirms next-gen EPYC 'Venice' Zen 6 CPUs are first HPC chip made on TSMC's new N2 process We should ...

Today, the company announced A14, a next-gen GAAFET process that promises to be a considerable step up over its current cutting-edge N2 products. Let's talk about the state of TSMC's current ...

codenamed 'Venice' produced on the TSMC advanced 2nm (N2) process technology." SANTA CLARA, Calif., April 14, 2025 (GLOBE NEWSWIRE) -- AMD (NASDAQ: AMD) today announced its next-generation AMD ...

Synopsys has achieved first-pass silicon success using TSMC’s N2 process and certified digital and analog EDA (electronic design automation) flows for TSMC’s A16 and N2P technologies. The company said ...

But the convention of using nanometers to describe the process size has led to a slight naming issue for TSMC. All was fine when it was N7, N5, N3, and N2 – but we heard back in 2023 that the ...

AMD put out a release yesterday, justifiably crowing that one if its EPYC "Venice" processors was the first HPC product to tape out and be brought up on TSMC's advanced 2nm (N2) chip process tech.

Next-generation AMD EPYC CPU, codenamed “Venice,” is the first HPC product to be brought up on TSMC’s next-generation N2 node — SANTA CLARA, Calif., April 14, 2025 (GLOBE NEWSWIRE ...