Samsung Electronics is accelerating efforts to localize the production of extreme ultraviolet (EUV) blank masks in South ...

TSMC reaffirmed that it will not use High-NA EUV lithography for its upcoming A16 and A14 process technologies, as Low-NA EUV tools combined with internal innovations provide sufficient scaling ...

Multiple masks per chip layer would simply add insult to injury. Instead, TSMC is banking on 0.33-NA EUV plus multi-patterning wizardry to keep its chips complex but not wallet-melting.

TSMC’s 3nm process is a game-changer, especially for AI and high-performance computing (HPC). It’s not just about shrinking ...

Says Low-NA is still pulling its weight TSMC appears to be in no rush to adopt ASML’s pricey High-NA EUV machines, despite rivals like Troubled Chipzilla already scribbling them into future ...

As global tensions rise over semiconductor supply chains, this article explores why the U.S. relies on Taiwan, China’s attempts to catch up, and the technological gaps that still exist.

Bookings remain soft, with no new EUV orders from TSMC, raising questions around 2026 demand, despite unchanged 2025 guidance.

TSMC's 14% dip presents a value opportunity amid AI-driven growth, resilient margins & U.S.-led trade shifts. Read more on TSM stock here.

Making high-NA EUV lithography work will take a manufacturing-worthy approach to stitching together circuits or a wholesale change to larger masks. Circuit stitching between the exposure fields is ...

It's also the only producer of extreme ultraviolet (EUV) lithography systems, which TSMC, Samsung, and Intel all use to manufacture their most advanced chips at their foundries.

Intel said on Tuesday that several of its contract manufacturing customers planned to build test chips for a forthcoming advanced manufacturing process, which the company still has in development.