EDN

Power IC complies to DDR/DDR II JEDEC specs

The TPS5116 power management IC is fully compliant to DDR and DDR II JEDEC specifications. Housed in a 10-pin HTSSOP, the device achieves greater than 85% VDDQ at 10 mA and operates from 3 to 28 V.
EDN

First highly integrated power-management IC for DDR cache-memory battery backup eliminates multiple discrete components in existing solutions

Maxim Integrated Products (PINK OTC MARKETS: MXIM) introduces the DS2731 integrated power-management IC (PMIC) for DDR cache-memory backup. This PMIC integrates a single-cell Li+ charger, ...
Electronic Design

PWM Controller IC Aims At DDR Memory Arrays

The IRU3038 synchronous pulse-width modulation (PWM) controller IC handles the termination-voltage requirements of double-data-rate (DDR) memory arrays. By ...
Electronics Weekly

Maxim DS2731 integrated power-management IC (PMIC) for DDR cache-memory backup

This PMIC integrates a single-cell Li+ charger, power-steering system to control switchover between system power and battery power, and a 2MHz synchronous buck regulator that “regulates” the DDR ...
Design-Reuse

Secure-IC's Securyzr(TM) DDR Encrypter

The DDR encrypter IP Core module enables on-the-fly encryption and authentication to the external memory. It supports AXI slave/master interfaces, A ...