Asynchronous FIFO is most widely used in the System-on-Chip (SoC) designs for data buffering and flow control. As the designs gets complex, the probability of occurrence of bugs increases.

In this FIFO design, comparing the read and write pointersdetermines the FIFO status. Pointer comparison in asynchronous designsis more challenging, because each pointer exists in a different ...

Consider an asynchronous FIFO for example: The general approach of designing an asynchronous FIFO is shown in Figure 1. Since data ‘read’ and ‘write’ operations on this FIFO work on separate ...

Asynchronous FIFOs involve multiple clock domain crossings for empty- and full-flag calculation as well as a data read to the destination domain. The following two false violations are commonly ...